Lena/Sep 2016: Difference between revisions
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=== Lab meeting === |
=== Lab meeting === |
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* [[File:2016.09.01 Group Meeting.pdf|Zack's notes]] |
* [[File:2016.09.01 Group Meeting.pdf|Zack's notes]] |
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* Thad suggested that we should have logarithmic amplifier (so the signal is large enough for the ADC), and a PID loop at sub-Hz frequency to get rid of the DC fields around the sensor array. |
* Thad suggested that we should have a logarithmic amplifier (so the signal is large enough for the ADC), and a PID loop at sub-Hz frequency to get rid of the DC fields around the sensor array. |
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Revision as of 21:31, 1 September 2016
September 2016
BACK/NEXT
09/01/2016
Moving modulation/demodulation into LUT
Started on addressing the problems in the LabVIEW VIs. The first problem are the overflows in modulation/demodulation paths. The problem is that two 16-bit words are multiplied and they result in a 32 bit word, which is then scaled to fit back into a 16-bit word, and the scaling is not done correctly. I updated the VI, but it wouldn't compile because the compiler ran out of DSP48 blocks. The solution was to replace the Numeric multiplication blocks with High-throughput multiplication blocks and set the implementation to Look-Up Table, as described in this link http://forums.ni.com/t5/LabVIEW/Large-FPGA-vi-compiled-in-LV-2009-but-not-2010/m-p/1678820#M597625
Lab meeting
- File:2016.09.01 Group Meeting.pdf
- Thad suggested that we should have a logarithmic amplifier (so the signal is large enough for the ADC), and a PID loop at sub-Hz frequency to get rid of the DC fields around the sensor array.