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Lena/Sep 2016: Difference between revisions
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→Measurements
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| 2016.08.31 || 00 || 02 || Z mode, 16 bit, no RTD, electronic noise
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=== RTD ===
The RTD (model) doesn't seem to be magnetic.
=== Noise comparison ===
==== PSD ====
The 32-bit version performs as good as the hardware lock-in. For some reason, the hardware lock-in PSD noise increases for higher frequencies, and for the 32-bit FPGA lockin it doesn't. The 32-bit version has 50 times smaller noise level than the 16-bit version.
[[File:Electronic noise comparison 2016 09 16.png]]
The data is acquired at the sampling rate of 500 ksps, and then averaged to approximately 200 sps (final FPGA filter has fc=180 Hz). This should improve the bit resolution by a factor of Sqrt(500 ksps/200 sps) = Sqrt(2500) = 50 (6-7 bits).
The estimated gain was 25 μV/fT. The LSB voltage step is 300 μV, the effective LSB after averaging should be 300/50 = 6 μV = 0.25 fT.
==== Filtering/digitization ====
The digitization of the signal is not visible in the 32 bit version.
(image here)
=== Issues with the 32-bit magnetometer ===
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